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IS31FL3193 integrated silicon solution, inc. ? www.issi.com 1 rev.a, 12/21/2011 3-channel fun led driver january 2012 general description IS31FL3193 is a 3-channel fun led driver which features two-dimensional auto breathing mode. it has one shot programming mode and pwm control mode for rgb lighting effects. the maximum output current can be adjusted in 5 levels (5ma~42ma). in pwm control mode, the pwm duty cycle of each output can be independently programmed and controlled in 256 steps to simplify color mixing. in one shot programming mode, the timing characteristics for output current - current rising, holding, falling and off time, can be adjusted individually so that each output can independently maintain a pre-established pattern achieving mixing color breathing or a single color breathing without requiring any additional interface activity, thus saving valuable system resources. IS31FL3193 is available in dfn-10 (3mm 3mm). it operates from 2.7v to 5.5v over the temperature range of -40c to +85c. features ? one group rgb, single color led breathing system-free pre-established pattern ? 3 independently controlled automatic and semiautomatic breathing system-free pre-established pattern ? i2c interface, automatic address increment function ? 3 independently controlled outputs of 256 pwm steps ? 2.7v to 5.5v supply voltage ? 5 levels programmable output current ? over-temperature protection ? operating temperature t a = ? 40c ~ +85c ? dfn-10 (3mm 3mm) package applications ? mobile phones and other hand-held devices for led display ? led in home appliances typical application circuit figure 1 typical application circuit note: the ic should be placed far away from the mobile antenna in order to prevent the emi.
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 2 rev.a, 12/21/2011 pin configuration package pin configuration (top view) dfn-10 sdb out2 out1 vcc sda scl ad gnd 1 2 3 4 6 7 8 9 v_bm 10 out3 5 pin description no. pin description 1 sdb shutdown the chip when pulled to low. 2 vcc power supply. 3~5 out1~out3 current source outputs. 6 gnd ground. 7 ad i2c address setting. 8 scl i2c serial clock. 9 sda i2c serial data. 10 v_bm breathing mark signal output. thermal pad connect to gnd. copyright ? ? ? 2011 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 3 rev.a, 12/21/2011 ordering information industrial range: -40c to +85c order part no. package qty/reel IS31FL3193-dls2-tr dfn-10, lead-free 2500
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 4 rev.a, 12/21/2011 absolute maximum ratings supply voltage, v cc - 0.3v ~ +6.0v voltage at any input pin - 0.3v ~ v cc +0.3v maximum junction temperature, t jmax 150c operating temperature range, t a - 40c ~ +85c storage temperature range, t stg - 65c ~ +150c esd (hbm) 7kv note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of th e specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics t a = - 40c ~ +85c, v cc = 5v, unless otherwise noted. typical value are t a = 25c. symbol parameter condition min. typ. max. unit v cc supply voltage 2.7 5.5 v i cc quiescent power supply current v sdb = v cc 0.8 ma i sd shutdown current v sdb = 0v 2.5 a v sdb = v cc , software shutdown 3.5 i out output current pwm control mode, v ds = 0.5v pwm register(04h~06h) = 0xff current register(03h) = 0x00 42 (note 1) ma v hr current sink headroom voltage i out = 42ma 500 mv logic electrical characteristics (sda, scl, sdb, ad) v il logic ?0? input voltage v cc = 2.7v 0.4 v v ih logic ?1? input voltage v cc = 5.5v 1.4 v i il logic ?0? input current 5 (note 2) na i ih logic ?1? input current 5 (note 2) na
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 5 rev.a, 12/21/2011 digital input switching characteristics (note 3) symbol parameter condition min. typ. max. unit f scl serial-clock frequency 400 khz t buf bus free time between a stop and a start condition 1.3 s t hd, sta hold time (repeated) start condition 0.6 s t su, sta repeated start condition setup time 0.6 s t su, sto stop condition setup time 0.6 s t hd, dat data hold time 0.9 s t su, dat data setup time 100 ns t low scl clock low period 1.3 s t high scl clock high period 0.7 s t r rise time of both sda and scl signals, receiving (note 4) 20+0.1cb 300 ns t f fall time of both sda and scl signals, receiving (note 4) 20+0.1cb 300 ns note 1: i out represents the average output current of each individual output. see pwm register, table 7. note 2: all leds are on. note 3: guaranteed by design. note 4: cb = total capacitance of one bus line in pf. i sink 6ma. t r and t f measured between 0.3 v cc and 0.7 v cc .
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 6 rev.a, 12/21/2011 detailed description i2c interface the IS31FL3193 uses a serial bus, which conforms to the i2c protocol, to control the chip?s functions with two wires: scl and sda. the IS31FL3193 has a 7-bit slave address (a7:a1), followed by the r/w bit, a0. since IS31FL3193 only supports write operations, a0 must always be ?0?. the value of bits a1 and a2 are decided by the connection of the ad pin. the complete slave address is: table 1 slave address (write only): bit a7:a3 a2:a1 a0 value 11010 ad 0 ad connected to gnd, ad = 00; ad connected to vcc, ad = 11; ad connected to scl, ad = 01; ad connected to sda, ad = 10; the scl line is uni-directional. the sda line is bi-directional (open-collector) with a pull-up resistor (typically 4.7k ? ). the maximum clock frequency specified by the i2c standard is 400khz. in this discussion, the master is the microcontroller and the slave is the IS31FL3193. the timing diagram for the i2c is shown in figure 2. the sda is latched in on the stable high level of the scl. when there is no interface activity, the sda line should be held high. the ?start? signal is generated by lowering the sda signal while the scl signal is high. the start signal will alert all devices attached to the i2c bus to check the incoming address against their own chip address. the 8-bit chip address is sent next, most significant bit first. each address bit must be stable while the scl level is high. after the last bit of the chip address is sent, the master checks for the IS31FL3193?s acknowledge. the master releases the sda line high (through a pull-up resistor). then the master sends an scl pulse. if the IS31FL3193 has received the address correctly, then it holds the sda line low during the scl pulse. if the sda line is not low, then the master should send a ?stop? signal (discussed later) and abort the transfer. following acknowledge of IS31FL3193, the register address byte is sent, most significant bit first. IS31FL3193 must generate another acknowledge indicating that the register address has been received. then 8-bit of data byte are sent next, most significant bit first. each data bit should be valid while the scl level is stable high. after the data byte is sent, the IS31FL3193 must generate another acknowledge to indicate that the data was received. the ?stop? signal ends the transfer. to signal ?stop?, the sda signal goes high while the scl signal is high. address auto increment to write multiple bytes of data into IS31FL3193, load the address of the data register that the first data byte is intended for. during the IS31FL3193 acknowledge of receiving the data byte, the internal address pointer will increment by one. the next data byte sent to IS31FL3193 will be placed in the new address, and so on (f igure 5). figure 2 interface timing data line stable; data valid change of data allowed scl sda figure 3 bit transfer
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 7 rev.a, 12/21/2011 figure 4 writing to IS31FL3193(typical) figure 5 writing to IS31FL3193(automatic address increment) registers definitions table 2 register function address name function table default 00h shutdown register set software shutdown mode 3 0000 0001 01h breathing control register set the breathing function 4 0000 0000 02h led mode register set operation mode 5 03h current setting register set output current 6 04h~06h pwm register 3 channels pwm duty cycle data registers 7 07h data update register load pwm registers and led control register? data - xxxx xxxx 0ah ~ 0ch t0 register set the t0 time 8 0000 0000 10h ~ 12h t1&t2 register set the t1&t2 time 9 16h ~18h t3&t4 register set the t3&t4 time 10 1ch time update register load time registers? data - xxxx xxxx 1dh led control register out1~ out3 enable bit 11 0000 0111 2fh reset register reset all registers to default value - xxxx xxxx table 3 00h shutdown register bit d7:d6 d5 d4:d1 d0 name - en - ssd default 00 0 0000 1 the shutdown register sets software shutdown mode of IS31FL3193. en channel control 0 all channel disable 1 all channel enable ssd software shutdown enable 0 software shutdown mode 1 normal operation
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 8 rev.a, 12/21/2011 table 4 01h breathing control register bit d7:d6 d5 d4 d3 d2 d1:d0 name - rm ht - bme css default 00 0 0 0 0 00 the breathing control register sets the breathing function. rm ramping mode enable 0 disable 1 enable ht hold time selection 0 hold on t2 1 hold on t4 bme breathing mark enable 0 disable 1 enable css channel selection 00 out1 01 out2 10 out3 table 5 02h led mode register bit d7:d6 d5 d4:d0 name - rgb - default 00 0 00000 the led mode register sets operation mode of IS31FL3193. rgbx rgb mode selection 0 pwm control mode 1 one shot programming mode table 6 03h current setting register bit d7:d5 d4:d2 d1:d0 name - cs - default 000 000 00 the current setting register stores the maximum current setting, i max , for all of the led output channels. cs current setting 000 42ma 001 10ma 010 5ma 011 30ma 1xx 17.5ma table 7 04h~06h pwm register(out1~out3) bit d7:d0 name pwm default 0000 0000 the value in the pwm registers modulate the rgb leds in 256 steps. the value of the pwm registers decide the average output current of out1~out9. the average output current may be computed using the formula (1): ? ? ? ? 7 0 2 * ] [ 256 n n max out n d i i (1) where d[n] stands for the individual bit value, 1 or 0, in location n. for example: if d7:d0 = 10110101, i out = i max (2 0 +2 2 +2 4 +2 5 +2 7 )/256 i max is set by current setting register. 07h pwm update register the data sent to the pwm registers and the led control registers will be stored in temporary registers. a write operation of any 8-bit value to the update register is required to update the registers (04h~06h, 1dh). table 8 0ah~0ch t0 register (out1~out3) bit d7:d4 d3:d0 name t0 - default 0000 0000 the t0 registers set the t0 time in one shot programming mode. t0 t0 setting 0000 0s 0001 0.13s 0010 0.26s 0011 0.52s 0100 1.04s 0101 2.08s 0110 4.16s 0111 8.32s 1000 16.64s 1001 33.28s 1010 66.56s
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 9 rev.a, 12/21/2011 table 9 10h~12h t1&t2 register (out1~out3) bit d7:d5 d4:d1 d0 name t1 t2 - default 000 0000 0 the t1&t2 registers set the t1&t2 time in one shot programming mode. t1 t1 setting 000 0.13s 001 0.26s 010 0.52s 011 1.04s 100 2.08s 101 4.16s 110 8.32s 111 16.64s t2 t2 setting 0000 0s 0001 0.13s 0010 0.26s 0011 0.52s 0100 1.04s 0101 2.08s 0110 4.16s 0111 8.32s 1000 16.64s table 10 16h~18h t3&t4 register (out1~out3) bit d7:d5 d4:d1 d0 name t3 t4 - default 000 0000 0 the t3&t4 registers set the t3&t4 time in one shot programming mode. t3 t3 setting 000 0.13s 001 0.26s 010 0.52s 011 1.04s 100 2.08s 101 4.16s 110 8.32s 111 16.64s t4 t4 setting 0000 0s 0001 0.13s 0010 0.26s 0011 0.52s 0100 1.04s 0101 2.08s 0110 4.16s 0111 8.32s 1000 16.64s 1001 33.28s 1010 66.56s 1ch time update register the data sent to the pwm registers and the led control register will be stored in temporary registers. a write operation of any 8-bit value to the update register is required to update the registers (0ah~0ch, 10h~12h, 16h~18h). table 11 1dh led control register (out1~out3) bit d7:d3 d2:d0 name - out3:out1 default 00000 111 the led control registers store the on or off state of each channel led. outx led state 0 led off 1 led on 2fh reset register once user writes any 8-bit data to the reset register, IS31FL3193 will reset all registers to their default value. on initial power-up, the IS31FL3193 registers are reset to their default values for a blank display.
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 10 rev.a, 12/21/2011 typical application general description IS31FL3193 is a 3-channel led driver with two-dimensional auto breathing and pwm control mode. it can drive three individual leds or one group of rgb. pwm control by setting the rgbx bits of the led mode register (03h) to ?0?, the IS31FL3193 will operate in pwm control mode. the pwm registers (04h~06h) can modulate led brightness of 3 channels with 256 steps. for example, if the data in pwm register is ?0000 0100?, then the pwm is the fourth step, with a duty cycle of 4/256. in pwm control mode, a new value must be written to the pwm registers to change the output pwm duty cycle. writing new data continuously to the registers can modulate the brightness of the leds to achieve a breathing effect, blinking, or any other effects that the user defines. rgb breathing control with auto color changing by setting the rgbx bits of the led mode register (03h) to ?1?, the IS31FL3193 will operate in one shot programming mode. in this mode, the rgb intensity is automatically modulated in a breathing cycle, independently controlled by t0~t4. t0 is an offset time period which runs only once at the start of the cycle. the full cycle is t1 to t4 (figure 6). setting different t0~t4 can achieve rgb breathing with auto color changing. the maximum intensity of each rgb is adjusted independently by the pwm registers (04h~06h). figure 6 breathing timing rgb auto breathing control with color setting IS31FL3193 can pre-establish pattern achieving mixing color breathing. there is one group rgb. the rgb consists of three channels. every channel has an 8-bit pwm data register. the color can be set by the pwm data register. by adjusting the individual intensity of the red, green and blue led, different colors are perceived. for example, the three pwm data: 20h, 80h, c8h, will determine one particular color. after setting the color, t0~t4 time register will be set to control the led breathing panel. and t0~t4 time should be same for each of the rgb leds, otherwise the pre-established color will change. semiautomatic breathing by setting the rgbx bits of the led mode register (03h) to ?1? and the rm bit of the breathing control register (01h) to ?1?, the ramping function is enabled. ht is the time select bit. when ht bit is set to ?0?, t2 will be held forever, and the led will remain at the programmed maximum intensity. when ht bit is set to ?1?, t3 will continue and t4 will be held, causing the led to complete one breathing cycle and then remain off. breathing mark function by setting the bme bit of the breathing control register (01h) to ?1?, the breathing mark function is enabled. v_bm is an output pin. the breathing mark function is useful as a signal to notify the mcu when to update the color data. at the end of time period t1, v_bm will induce a falling edge and hold logic low, so the new data can be sent by mcu at this time. at the end of t3, v_bm will induce a rising edge and the mcu can send an update command to update all data simultaneously (figure 7). the marking channel (out1~out3) is selected by the css bits of the breathing control register (01h). figure 7 v_bm signal shutdown mode shutdown mode can either be used as a means of reducing power consumption or generating a flashing display (repeatedly entering and leaving shutdown mode). during shutdown mode all registers retain their data. software shutdown by setting ssd bit of the shutdown register (00h) to ?0?, the IS31FL3193 will operate in software shutdown mode, wherein they consume only 1 a (typ.) current. when the IS31FL3193 is in software shutdown mode, all current sources are switched off. hardware shutdown the chip enters hardware shutdown mode when the sdb pin is pulled low, wherein they consume only 1 a (typ.) current.
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 11 rev.a, 12/21/2011 classification reflow profiles profile feature pb-free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60-120 seconds average ramp-up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60-150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) max 30 seconds average ramp-down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. figure 8 classification profile
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 12 rev.a, 12/21/2011 tape and reel information
IS31FL3193 integrated silicon solution, inc. ? www.issi.com 13 rev.a, 12/21/2011 package information dfn-10 note: all dimensions in millimeters unless otherwise stated.

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